High performance processor systems containing multiple circuit boards frequently encounter system performance problems at high speed due to electrical noise and cross-talk generated by signals passing through the board connectors. The longer signal lines are and the closer they get to one another, the worse the noise and cross-talk problems become. It is therefore a good design practice to minimize the number of signals lines that are sent through a connector between circuit boards. A reduced number of signals passing through a connector containing a given number of pins allows the high speed switching signals to be spaced further apart within the connector, thereby reducing the amount of cross-talk between the lines.
Additionally, the reduction in signals passing through the connector creates unused connector pins that may now be used as ground connections to couple the ground planes of the circuit boards, thereby reducing drift in the ground planes towards the power supply. Alternatively, in systems where cross-talk and noise are not significant problems, reducing the number of signals passing through the connector is still a desirable goal because the reduction in pins required allows for smaller connectors to be used, thereby saving valuable board space.
One instance where the reduction of signals lines becomes important in a high performance processor system is the connection between a memory motherboard and its RAM daughterboards. Typically, high performance computers have large memory address and data buses that operate at high speed. It is particularly desirable to reduce the large number of bus signal lines that pass through the connector since typically the signal lines that comprise the address and data buses are in close proximity when they pass through the connectors from the motherboard to the daughterboards, which results in greatly increased cross-talk. Furthermore, if the memory chips and their control circuitry are on different cards, the number of control signals passing through the connector leads to additional noise problems. Therefore, it is a further desirable goal to reduce the number of control signals passing through the connectors.
Thus, a need has arisen for apparatus, systems, and methods for minimizing the number of signals being passed through a connector. Furthermore, a need has arisen for apparatus, systems, and methods providing flexible memory controls which allow for the use of memory devices of varying performance parameters in a single design while minimizing the amount of control hardware required.